Two Conferences – Two Industries Challenged By Post PC Era

Tim Cook introducing Apple's latest iPad

The “Post Personal Computer” (Post PC) era became the hot topic when Tim Cook introduced the latest iPad last week. Yes, calling it a “revolution” is definitely hype that is part of Apple‘s Post PC marketing campaign. Hype aside, it is clear that there has been a marked shift in digital hardware for the consumption of content and communication. The PC – be it a Windows, Mac, or Linux based system – is no longer “the device”. It is now one of many devices including portable music players (dominated by iPods), smart phones (lead by iPhones and Android based systems), and tablets (dominated by iPads). The shift is large and the impact is huge. To understand how big, watch the first three minutes of Mr. Cook’s presentation. Then you will understand why Apple had the largest market capitalization of any US company in February – the numbers are staggering.

Even though many were surprised to learn that we are now “Post PC”, some of us who have been developing strategies for the electronic supply chain have known this for a while now even if the term wasn’t in use. The earliest I recall the term used was in Glen Burchers’ presentation “MEMS Sensors: Becoming Pervasive and Intelligent” at the Globalpress Electronic Summit 2011 early in 2011, where he described the proliferation of sensors as mobile devices become the dominant computing platform. I started using the “Post PC” term mid-last year after William Chen’s keynote at the IEEE Semiconductor Wafer Test Workshop (SWTW) discussed the proliferation of semiconductor package technology and news reports of Apple outselling Lenovo in China. Before then, the shift was lumped in with the growth of mobile devices and “More than Moore“.

The basic architecture of the PC was defined originally by IBM and over time Intel has increasingly driven the specification of the system. Even though there are multiple PC vendors, they all satisfy these basic specifications which result in fairly similar systems at a hardware level – i.e. PCBs and semiconductors (both microprocessors and chipsets) are similar regardless of vendor. As Mr. Chen describes, in the Post PC world most companies want a differentiated product which results in different specifications and functionality. This in turn leads to innovation with each company pushing the functionally of their semiconductors resulting in the proliferation of the different types of semiconductor packaging used. Long gone are the days when there were only a handful of different devices and packaging types due to the similarity of PC hardware.

The result of this proliferation along with other implications of the Post PC era was clearly visible at the recent IPC APEX EXPO. APEX EXPO is a conference and exhibition focused on the design and fabrication of printed circuit boards (PCB), electronic assembly (placing components on PCBs and other assembly work), and test. It has always been a challenge to efficiently and economically attach components (semiconductors, passives, and other electronic parts) of widely varying shapes, sizes, and weights precisely on PCBs using automated equipment. Some of these tools place upwards of 100,000 components per hour in a mind boggling and/or mesmerizing “dance” of precision motor-driven modules.

Of the handful of automated component placement companies exhibiting, there were several that are clearly challenged with some of the older packaging technology. It is unlikely they are up to the challenges of more advanced packaging such as Package-on-Package, bare die, or the upcoming 2.5D and 3D packaging all driven by the Post PC era. At the other extreme, some of the companies were showing unique innovations to differentiate their products and offer needed solutions to their customers. For example, Universal Instruments was quietly demonstrating their unique Innova Die Handler which allows their placement system to pick bare die directly from the wafer tape frame for a variety of advanced applications.

Since the Post PC world revolves around mobile devices, small devices and low power consumption (longer battery life) are critical features. In addition to pushing to more advanced packaging due to higher levels of integration within the package reduce both power and space, the smaller devices have pushed PCB material systems in terms of accommodating these typically finer pitch devices (closer space of electrical terminals) in all aspects of electrical connectivity and properties, thermal compatibility, and mechanical stability. These advanced materials and solutions were also on display from the different vendors and the wide selection and variation between solutions can make selection difficult.

Many of the challenges posed by advanced packaging driven by the Post PC products were also seen at the recent Burn-in & Test Strategy (BiTS) Workshop. Several of the presentations focused on test contactors (used to temporarily provide electrical interconnect to test a packaged device) to support advanced packages such as wafer level chip scale packages (WLCSP) which are moving from 0.4 and 0.5 mm interconnect pitch to 0.3 mm and lower. In addition, as operating frequencies increase, power delivery and signal integrity are becoming more challenging in the test environment. The PCBs, which are becoming more complex for the end product as seen at the APEX EXPO, are becoming horrendously complex when designed for test applications between the requirements of the test systems and the desire to test multiple packaged parts at once (sometimes eight or more in parallel).

As these advanced packages shrink in size, they often become more fragile and difficult to handle both manually and with automated handling equipment. There are many concerns about handling 2.5D and 3D packaging due to the unknown robustness of multiple thinned die in one package. As a different approach to handling devices, Tom Di Stefano of Centipede Systems discussed the benefits of their Test-In-Tray system to manage gang testing of multiple packaged parts or bare die.

From their presentation “Package Level Test Challenges – Delivering More Than A Technology”, it was clear that Intel managers John Morrissey and Mark Hopman have their organizations focused on addressing the challenges of a Post PC market. As Intel shifts their business to include more system-on-a-chip (SOC) products they are moving from their extremely high volume with low mix environment to one of high mix and high volume. As the mix increases, their teams will have to manage substantially greater number of designs of “test tooling” (fixtures that are specific to each semiconductor design including load boards and wafer probe cards). As product generations are accelerated, they have less time to design and implement this tooling which has grown increasingly complex as the end product complexity has increased. These challenges have forced Intel to reexamine and improve their basic processes while reevaluating their suppliers. They are in search of better solutions from more vertically integrated suppliers. If they can’t find appropriate solutions to these issues, they may resort to doing it themselves.

At both of these events, it was clear that many companies that are simply reacting to today’s market needs based upon their industry knowledge . Some of these companies are struggling to keep up – especially those who only saw the incremental changes to their markets. The real market leaders recognized the potential for disruption from these global forces, even before they had a name such as “Post PC”, and proactively developed solutions and positioned themselves for the future. As Messrs. Morrissey and Hopman reminded their suppliers, you either have the solutions we need or we will go elsewhere to find them.



Please see my post “iPad Memories… or Memory Magic via More Than Moore” for a discussion of the incredible packaging technology of stacked NAND Flash and Package-on-Package technology that is used in all of the iPads.



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