Is 3D semiconductor packaging really the Lego of the integrated circuit (IC) world? It is a great analogy for the range of possible solutions and flexibility provided by different flavors of 3D packaging (2.5D on interposer, 3D, 5.5D, etc.) and “colors” (homogenous and heterogeneous) of die stacks. Plenty of pictures of Legos and scanning electron microscope (SEM) images were shown last week at the RTI InternationalTechnology Venture Forum symposium and conference “3-D Architectures for Semiconductor Integration and Packaging”. Presenters clearly articulated the great promise of what could be built with 3D packaging. At the same time, progress towards solving the multitude of challenges to make this technology as pervasive, if not as easy to use and fun, as Legos was discussed.
Suddenly, all the computers in my office fell silent but strangely the room lights were still on. After initial panic and bewilderment, I was able to solve the mystery and was again reminded of the value of standards and budgeting to do it right from the beginning (pay now to avoid paying more later).
Even though I did not immediately respond by formally establishing a structured problem solving methodology with an eight step discipline (or other QMS variant), my engineering background intuitively guided me through a similar process. This was also a reminder that troubleshooting very simple systems without advanced preparation can be fairly complex and time consuming, therefore proactive preparation for complex systems is essential.