iPad Memories

…or Memory Magic via More Than Moore

No this isn’t a soliloquy to an Apple iPad that is no longer, but a brief tour of the incredible memory, packaging, and system technology that can be found under the hoods of the original iPad and the iPad 2 along with some of the manufacturing and test implications. These devices clearly demonstrate the new paradigm of “More Than Moore“ where scaling of systems and packaging will propel the next wave of growth in electronics beyond the traditional doubling of performance every two years predicted by Moore’s Law. For many in semiconductor packaging and test engineering communities the issues related to More than Moore have been an academic discussion up to now, but clearly the success of the iPad product line shows the current reality for advanced devices and where the future is headed. Apple and their suppliers took huge risks in developing these new technologies in exchange for substantial returns.

As I recently noted in “Memory Alphabet Soup“, the most pressing question about memory most consumers currently have is “which iPad 2?” – 16 GB, 32 GB, or 64 GB? If Mr. Jobs believed in user memory upgrades most everyone would buy the lowest memory configuration and worry about upgrading later. This is the typical behavior with desktop system and digital cameras especially as the price of memory decreases. Part of Apples marketing strategy with closed “boxes” (or platforms) is to encourage the purchase of new devices on a regular schedule (sometimes yearly) for cool new functions or increased performance.

Mr. Jobs however has succeeded in reducing extremely complex technology to a very simple decision of which configuration to buy in such a way that the technology remains hidden. It is also clear that the marketing and product requirements drove the product design and not the engineering. Apple started developing the iPad before the iPhone (at least 5 years prior to introduction) and had to wait until the technology was ready. As beneficiaries of teardowns -as I discussed in “HOW and WHY things work” – we get a sneak peek “under the hood” of this devices.

With the iPad 2 there is a substantial price increase from the 16 GB model to 32 GB model of $100. And another $100 to step up to a full 64 GB model. Part of this pricing is pure profit to Apple’s bottom line and part is due to the design of the iPad 2. Both the original and the iPad 2 have two locations on the printed circuit board (PCB) for NAND flash memory as shown in this iFixIt teardown of the original iPad. Since the largest NAND flash memory currently in volume production is a 64 Gb (gigabit) it means that the memory parts need to be stacked for anything over the 16 GB model.

Even though companies can achieve stacking multiple ICs in a single package, where the bare die are placed in a stack and the die are electrically interconnected to each other, it is a non-trivial engineering feat that comes at additional expense. There are many associated test issues – such as when to do test (each individual die before assembly, after assembly in the package or both), where is the test access (individual die may be hard enough to contact but where does one contact a stack of die), how and when to do memory repair (swap in redundant memory cells at the die level or at the package level). Due to complexity and yield of both the assembly and test process, prices do not scale linearly – the more die in a package, the higher price per die (or bit). From published tear downs of the original iPad, both Samsung and Toshiba memory have been found in the iPad so they have found answers to these challenges.

By chance two of the iPad 2 teardowns were of different memory configurations highlighting some interesting differences. The TechInsight teardown shows two Samsung K9PFG085U5A which are 256 Gb Multi-Level Cell (MLC) NAND Flash for a 64 GB iPad 2. Samsung’s website currently shows that this 256 Gb part is still in “Engineering Sample” status – i.e. not ready for high volume production. I’m fairly certain that Apple goes to the front of the queue and gets parts ahead of most others.

The iFixIt teardown shows a single Toshiba TH58NVG7D2FLA89 128 Gb NAND Flash part for a 16 GB iPad 2. So even though there is a premium for stacking two 64 Gb die in a package and there is space on the PCB for two parts, Apple has chosen to use a part with two die (i.e. 128 Gb) instead of attaching two parts (each 64 Gb with only one die per package). They may have decided there is a cost savings of using the more expensive part and only attaching one part versus two. Or this decision may have been made on the basis of availability of supply.

In June 2010 Toshiba announced a single memory “module” part that has 16 (yes sixteen!) 64 Gb die stacked along with a controller die to form a single 128 GB (bytes not bits). To fit this all in a 17 mm x 22 mm x 1.4 mm package they had to thin each die to an amazing 30 µm thick (approximately half the thickness of a human hair). [The photo above shows an older version with 16 x 32 Gb for 64 GB.] Needless to say there are many test issues related to the number of die and the thickness of each die not to mention the density of the assembled parts. Of course, many in the blogosphere were expecting this part to show up in the iPad 2 (which it hasn’t so far) and the iPhone 5 (remains to be seen).

The NAND flash memory for data storage is only part of the iPad technology story. Remembering that every modern computer needs two types of memory – storage (which the NAND flash provides) and execution (truly random access), where is execution memory in the iPad? The teardowns have show that Apple has “combined” it with their microprocessor. The A4 processor in the iPad is a true system on a chip (SoC) built using package on package (POP) technology. The A4 is a single core ARM processor built by Samsung mated with two 128 MB DRAMs. These are mobile DRAMs which are special lower powered versions. The market for mobile DRAM is exploding as smart phone volumes and capabilities grow.

The A5 processor in the iPad 2 has been boosted to a dual core ARM processor also built by Samsung mated with a single 512 Mb DRAM. TechInsights has noted that both Samsung and Elpida DRAMs have been observed in their teardowns of the A5 itself. The advantage of the POP approach over stacked die is this allows Apple to source the DRAMs independent of Samsung who is building the processor. And it allows Apple to use a different memory configuration for different products – for example they use the A4 in both the iPhone 4 (two 256 Mb DRAMs) and the iPad (two 128 Mb DRAM) – or as denser memory becomes available (possibly moving the iPhone 4 to a single 512 Mb DRAM). A glimpse in to their assembly and test strategies for the processors would certainly be educational due to the complexity of the issues this architecture raises. Hopefully Apple has coordinated a coherent test strategy with Samsung and the other subcontractors involved to optimize both cost and quality (along with yield).

Bottom line – the teardowns tell you far more then Apple does when they spec their latest processor as a “1GHz dual-core Apple A5 custom-designed, high-performance, low-power system-on-a-chip”. Clearly another example of their marketing driven product strategy – they are selling what the product does and not the engine under the hood. By taking a substantial risk and investing in new technology along with making smart architectural choices, Apple has poised their products to ride the waves of both Moore’s Law and More than Moore. Part of Mr. Jobs’ magic is he wants you to believe their devices are, well, magic.