Stephen G. Newberry (Vice Chairman of the Board, Lam Research Corporation) started off with a way forward in “Profitless Prosperity Revisited: Where Do We Go from Here?”. At SEMI ISS 2008, he presented “Era of Profitless Prosperity” which compared the situation of the semiconductor integrated circuit (IC) industry to the aluminum industry in the 1970s. At that time there was sufficient demand however average price (per function or bit) was dropping significantly faster than cost (per function or bit). He identified and recommended changes that needed to occur including: memory manufacturers should restructure (consolidation and/or focus on profitability over market share), independent device manufacturers (IDMs) in the logic and microprocessor space should change their business model (become fabless, fab-light, or consolidate), wafer front end (WFE) equipment and materials suppliers should continue to innovate to continuously reduce costs of production, and collaboration across the entire supply chain should improve.
Ignoring the downturn in 2008 and 2009, demand for semiconductors has increased while average selling price (ASP) has declined and industry profitability has improved. From 2007 to 2011, semiconductor company average operating profit (OP) improved from 12% to 17% for the top 40 firms (43 in 2011). When twenty of these firms such as Intel, Taiwan Semiconductor Manufacturing Company (TSMC), fabless, and analog companies are excluded the remaining 20 companies had only an average of 1% OP in 2007 which improved to a meager 5% in 2011. Only a handful of companies dominate the profits with a lot of companies that are marginally or totally unprofitable. In fact, five of the six worst performers in 2011 with OP lower than -20% were all companies that only produced dynamic random access memory (DRAM).
Using a metric of minimum OP equal to [(capital spending (CAPEX) – depreciation + 3%)] / 75%, the companies in the fabless and mature node analog-application specific IC (ASIC) markets were stable and profitable during both 2003-2007 and 2010-2011. The microprocessor segment improved from one company (Intel) of two in 2003-2007 being healthy to all (only Intel) being healthy in 2010-2011 by Advanced Micro Devices (AMD) switching to a fabless model and being dropped from the segment. The logic IDMs are also improving by switching to a fab-light model in which they outsource fabrication of new designs at advanced process nodes while continuing to operate their own fabs for existing products.
In the foundry segment, currently only TSMC has sufficient OP to fund capital spending for advanced process nodes using cash from operations. With both GLOBALFOUNDRIES and Samsung ramping up their foundry businesses this may change in the future. In the memory market, companies producing NAND flash memory are performing while the DRAM sector is doing poorly. Additional restructuring for the DRAM space is likely ahead.
Looking at the automotive industry, Steve used a 1980 Honda Accord with a manufacturer’s suggest retail price (MSRP) of $6,155 as an example. The price of the 1980 Accord would be $17,887 today when adjusted for inflation. Not only does the 2012 Accord have substantially improved performance and many new features, it also has a much higher MSRP of $25,105. The auto industry has figured out that customers will pay more (almost 50% in this example) if the manufacturer provides more of what the customer wants or values. The increased performance and features were enabled based upon the close customer (auto company) and supplier relationship which includes the auto companies contracting their suppliers to perform R&D to provide innovation. As a result the auto-industry, even with all of its problems, has a global growth rate of 3-4%.
Moving forward, the semiconductor industry needs to similarly increase performance and value as the cost-per-function decline slows. As scaling to the next process nodes becomes more difficult, semiconductor companies will differentiate themselves by becoming the fastest to delver next-generation capability. This will require stronger collaboration with their supply chain and increasing R&D efficiency by focusing efforts on a select number of vendors. System level optimization (not just chip performance improvements from the next process node) will be necessary. In addition, there will need to be increased industry and customer-supplier collaboration to transition to 450 mm wafers in order to lower costs even faster.
Even though there were some painful adjustments (consolidation and restructuring) and there are others underway, there is a path forward to healthy companies in both the semiconductor industry and supply chain.
In “Innovation – Defining The Future of Semiconductors“, Bernard S. Meyerson (IBM Fellow VP, Innovation, IBM) started by answering the question why does IBM spend over $6 B a year in R&D? The reason is that science determines the future of technology and IBM has a long history of focusing on “innovations that matter”.
The semiconductor industry is facing many challenges including:
- The cost of developing new technology from 2004 to 2010 grew at a rate (~12.2% CAGR) faster than revenue (~ 6.5% CAGR). And the estimated cost to develop 22 nm complementary metal-oxide-semiconductor (CMOS) logic technology will be around $2.3 B – over twice the ~ $1.1 B spent to develop 32 nm.
- The rapid increase in the complexity of materials used. This can be seen in the number of elements used growing from six (H, B, O, Al, Si, and P) up to the 1990’s, adding eight more from the 1990’s to 2005. And almost all of the periodic table is in use after 2006,.
- Previously scaling was possible without significant downsides in either electrical performance or materials. Now, each reduction in feature size needs an accompanying change in materials to compensate. We are also approaching the end of scaling due to quantum mechanical effects due to the small quantity (sometimes measured in atoms) of material present.
Yes, there has been innovation to extend the current paradigm in terms of materials, 3D transistors, and system integration including 3D packaging. Beyond these, IBM has focused on what it is next – in particular non-silicon field effect transistors (FETs), 3D integration, and magnetic storage. Bernie presented IBM device research including a gate-all-around silicon (Si) nanowire transistor, sub-10 nm carbon nanotube (CNT) FET, and graphene transistors.
He also showed two 3D integration examples: one of processing multiple layers of logic, memory, and photonics on one device as it is fabricated (not assembly of multiple devices into a stack) and a collaboration with 3M to develop electronic glue that is thermally conductive to allow the stacking of more devices. IBM has determined that it is “useless to pretend they have all the skills to tackle every challenge they encounter. They need to partner and have a supplier ecosystem.” This collaboration with 3M is a good example of that partnering.
Lastly he showed very recent breakthroughs in magnetic storage using only 12 atoms per memory bit (100x the density of today’s hard disk drives) and magnetic racetracks (storage of bit patterns in each memory location).
With the “Silicon Era” of increased IT performance based upon semiconductor scaling coming to an end (in about 10 years), new approaches will be needed to drive future performance. The increased performance will come from solutions of which the IC is only a small part. For example, integration of multiple ICs at the system level and beyond including software and network functionality.
Bill McClean (President, IC Insights) in Shocks and Correlations to the Semiconductor Market examined the interdependence between various markets and the semiconductor capital market. He forecasted a 7% year-over-year growth in world-wide electronics systems which is estimated to translate to a 7% growth in semiconductors for 2012. For 2010 to 2011, even though electronic systems grew 6%, semiconductors only grew 2% so there isn’t a 1-to-1 correlation, especially as companies consume inventory. He did note that the semiconductor industry has experienced a full blown recession.
The material suppliers were not upset with flow down forecast of 7%, however the semiconductor capital companies were rather disappointed at the -16% estimated growth in 2012. (The capital equipment market did however grow 15% from 2010 to 2011.)
In terms of general trends, he did show that neither the Dow Jones Industrial Average (DJIA) nor the U.S. Purchasing Managers Index (PMI) were well correlated or leading indicators for semiconductor market. One leading indicator he does watch is TSMC who discloses their sales every month since they are on the Taiwan Stock Exchange.
What happened to their previous forecast of 10% semiconductor growth in 2011? 2011 had eleven natural disasters with an impact of over $1B which exceeded the entire decade of the 1980’s. These disasters resulted in a reduction of approximately 8% resulting in the 2% growth observed. In addition, even though DRAM is only 12% of the total IC market it sustained significant losses which substantially shifted the overall market. Whereas all other ICs except DRAM devices had an increase of average selling prices (ASPs) 2010 to 2011of 3.1%, when the DRAM losses are included the ASP for all ICs declined 1.6%. And at the same time the overall market for non-DRAM devices grew at 5.0%, but when DRAM as added the overall market dropped 0.3% year-to-year.
In terms of the upcoming presidential election, it generally reduces the overall forecast since people can take bad news better than uncertainty. With bad news, people can make plans and move on with their lives. With uncertainty, they tend to delay action.
The semiconductor equipment forecast has steadily decreased as a percentage of overall semiconductor revenue. In 1996-2002 it was approximately 26%, from 2003-2009 it averaged 20%, and from 2010 thru 2016 it is forecasted to average around 16% as shown in the chart above. Bill also broke down semiconductor equipment spending as a function of device type and wafer volumes.
Lastly, IC Insights ranked the semiconductor companies on the basis of wafer capacity and capital spending in 2011. They identified Intel, Samsung, TSMC, Toshiba/SanDisk, Hynix, Micron, and GLOBALFOUNDRIES as the top companies with the greatest ability to compete. Bill expressed concerns about the viability of the others as these firms increase their market share.
In “Smart Grid: Overview, Issues and Opportunities“, S. Massoud Amin (Director, Technological Leadership Institute, University of Minnesota) highlights many of the challenges of the current and future power supply. By 2020, it is predicted that there will be more than 30 mega cities (cities with over 10 million people each). By 2050 this is expected to double to 60 mega cities and it is estimated that the world’s electrical supply will need to triple to keep up with demand. Over half of the US is coal powered which has been calculated to only have 1.6% overall efficiency in converting coal energy to light from generation plant to residential usage. (One major improvement to this is upgrading from incandescent light bulbs which have an overall 5% efficiency to fluorescent or LED lights with substantially greater efficiencies.)
Electronics have both contributed to energy efficiency and increased demand as greater numbers of devices are purchased and data centers are constructed. By 2030, data centers may consume 20% of the total US electricity consumed. Clearly there are challenges to be solved on both the supply and demand side.
Massoud listed the following as critical to achieve future energy demand while balancing economic and national security concerns:
- Build a stronger and smarter electrical energy infrastructure, ie. a Smart Grid
- Break our addiction to oil by transforming transportation to electric vehicles and other technology
- “Green” the electric power supply
- Increase energy efficiency
A Smart Grid would be an intelligent and resilient network that could manage peak demand, asset utilization, and reliability plus reduce emissions. Semiconductor devices would provide the brains as the grid is transitioned from an electro-mechanically controlled systems to electronically controlled one. Devices on the Smart Grid could be either controlled centrally or programmed to automatically respond to changing conditions. In order to make the extremely complex system or network that is the power grid more robust, requires a mix of intelligent devices that can act autonomously when required.
As part of their research, Massoud’s team has done extensive simulation of sensing and control strategies to optimize the network configuration and to predict how to defend the system from both attack and accidental disruption. The Smart Grid is not only an interconnected power delivery system, it is a sensor and control network where all the devices communicate. At the same time, as the grid “gets smarter”, it needs to accommodate the additional future loads especially if we wish to encourage electric vehicles.
Servicing the Smart Grid is a fairly complex market place of many different vendors supporting different components of the end-to-end network of power generation to the consumer. There is a wide range of estimates as to the global investment in Smart Grids by 2015 from $46 B (ABI Research) to $200 B with $53 B in the US alone (Pike Research). The semiconductor potential market is estimated to be $30 B alone over the next 10 years with a ~ 50% CAGR. There are substantial opportunities at all levels as the Smart Grid is designed and implemented.
James Koonmen (Senior Vice President, ASML and General Manager, Brion) presented “From Lab to Fab: Progress and Challenges for Industrialization of New Lithography Technologies“. The Internet of Things will drive future semiconductor demand. The four main end applications are media tablets, solid state drives, smart phones, and mobile personal computers (including mini-notebooks). All have greater than 15% CAGR and semiconductor revenue greater than $10 B in 2015. (Please see chart to right.)
In the last thirty years, ASML has gone from photolithography tools at 1,200 nm priced at < 0.5 M Euros / each to tools at < 18 to 32 nm priced at > 65 M Euros / each. The R&D cost of these systems has similarly increased from 50 M Euros to 1,500 M Euros. And roadmaps for logic, DRAM, and FLASH continue to call for additional process nodes at smaller and smaller features. The methods of achieving the desired sizes are immersion and extreme ultraviolet (EUV) lithography.
James provided a status update on the development progress of the NXT immersion tool. The tool is capable of 38 nm double patterning and they are working to improve it to provide quadruple patterning. At the same time, they are improving the critical dimension uniformity and production throughput. He also reviewed their “holistic” lithography product suite of tools to optimize masks prior to tape-out to maximize the process window and tools that measure the performance of the tools to control the process window. Mask optimization includes a new model based sub-resolution assist feature (MB-SRAF) and new optical proximity correction (OPC) methods.
ASML has now shipped six of the their NXE 3100 EUV systems. Four are in use by customers for development (in “production” by ASML’s definition), one is being qualified, and one is being installed. Even though a more costly tool, the EUV systems provide single exposure patterning per layer without having to use double or quadruple patterning. This in turn has a lower total cost of ownership due to the significant reduction in processing steps, additional process equipment and additional floor space for this equipment compared to double or quadruple patterning. In the IMEC development lab, they have achieved 16 nm line / space with a single exposure using the NXE 3100.
The NXE 3300 systems are currently running at 69 wafers / hour with a resolution of 22/18 nm. As ASML continues the commercialization of the these tools over the next two years, they will reach 125 wafers / hour throughput and increase the performance of the tool. By shipping tools today to early adopters, this allows a transition plan to keep customers from over investing in double patterning equipment. Detailed status of both the NXE 3100 and 3300 development was reviewed including the development of the laser-producted plasma (LPP) and electrical discharge (DPP) sources.
Future roadmaps of how to extend EUV to less than 10 nm were shared. And ASML has plans for 450 mm wafers post-EUV transition with volume production in 2016-2018. However, this is predicated on joint industry R&D and availability of other process tools.
In “Tech Trends from the 2012 International CES“, Shawn Du Bravac (Chief Economist & Director of Research, Consumer Electronics Association) provided an overview of recent trends and what was new in this year’s Consumer Electronics Show (CES) held the week before SEMI ISS. The introduction of many new screen based products (displays, tablets, e-readers) was apparent in 2010 especially as the price of display technology went down significantly. Microsoft Kinetic was also introduced in 2010 and has since become the fastest selling consumer electronic device when it was shipped late last year.
The major themes of CES 2011 were portable vs. pocketable devices (large displays, tablets, etc.), intelligence of things (smart pill bottles, appliances, etc.), “sensor”ization of consumer devices (increasing in many devices not just cell phones), and “application” (customizing the behavior of hardware with user selectable applications). The US household on average has twenty-five consumer electronic devices and the rate of adoption is increasing.
At this year’s CES the second decade of the “digital transition” started. In the first decade, analog devices (audio devices, telephones, cameras, televisions, etc.) were converted to digital formats. In this decade we will see power of digital technology – from fully interconnected / networked devices to systems for managing the increasing digital content of our lives.
Simultaneously, computing power is being moved out of (personal) computers. In the past, it was all about how much computing power could be built in to a notebook computer. With ultrabooks it more about weight, size, battery life, or other functionality than computing power. As such, Intel was touting the sheer number of design wins for ultra books (75) over processor specifications. Google Chromebooks and tablets were also prevalent showing the rise of thin clients where the computing power is in the cloud not on the device. As the computing power is redistributed from the PC it is showing up in other devices such as televisions and smartphones.
Many new devices are built on the premise of ubiquitous network connectivity which in turn enables additional thin client applications. Several new devices were introduced either with built in connectivity (such as the Nikon D4 camera which has a built in web interface) or to connect other devices (such as personal hotspots). More natural user interfaces were also featured to make device operation easier and more intuitive. We have come full circle from the original four button television remote (limited by technology) of the 1960-70’s to too many buttons on multi-function remotes to MEMS sensor based remotes with only a handful of buttons last year to voice control (no buttons) this year.
Lastly, device use-case scenarios of many products are being defined by the end user. Original equipment manufactures (OEMs) are delivering customizable hardware and services to enable this. Everything from smartphones where the user can install applications and buy a wide range of accessories to home automation modules to vehicles remotely controlled by a smart phone and often including a video camera.
Beyond the progress in the technologies discussed in this session, all the end user markets discussed have the potential for promising growth. The day definitely ended on a high note. More summaries to follow…