Chip Scale Review: International Wafer Level Packaging Conference (IWLPC) Turns 10!


Below is my event summary recently published in Chip Scale Review Tech Monthly:

Market adoption is increasing rapidly for wafer level packaging (WLP) as it is applied to a greater range of applications. The shift of “Post-PC” from desktop to mobile devices has driven the development of WLP into the mainstream by providing extremely space efficient and low cost packaging. There has and will continue to be many technical and business challenges in packaging devices on wafer (or other substrate) en masse instead of on an individual basis.

Similar to wafer level packaging technology itself, the 2013 International Wafer-Level Packaging Conference (IWLPC) technical presentations covered a large range of applications, challenges, and solutions. This 10th anniversary event with over six hundred total participants had thirty-nine presentations in three parallel tracks over the two days. In addition to “traditional” applications of WLP for integrated circuits (IC) covered in the “WLP” and “3D” presentation tracks, microelectromechanical systems (MEMS) WLP applications were highlighted in the “MEMS” track and general sessions this year.

In particular, Marco Aimi (General Electric Global Research Center – GE GRC) provided a high energy plenary on the industrial applications of MEMS. It may be more accurate that his was a “high current” presentation since an application highlighted was metal MEMS cantilever switches for industrial and power grid control handling hundreds of kilo amperes. By solving many of the technical challenges including packaging, not only does MEMS technology enable greater performance it delivers a competitive advantage.

Rozalia Beica (Yole Développement) kicked off the MEMS presentation track with a market overview of MEMS packaging along with what makes it “special”, i.e. higher cost than IC packaging. The application specific requirements are such that the cost to package and test a MEMS device averages a quarter of the total production cost. As standardization of MEMS packaging starts, the MEMS rule of thumb (attributed to Jean-Christophe Eloy, Yole Développement) of “1 MEMS Product = 1 MEMS Device = 1 Fabrication Process = 1 Package” requiring extremely high investment cost and development time is starting to weaken.

In “30 Years of Microsystem Packaging: From Automotive to Mobile Electronics and Beyond”, Leland “Chip” Spangler (Aspen Microsystems) traced the development of the MEMS industry from the pressure sensors developed in response to the United States Clean Air Act of 1970 to the present. As each device is truly a microsystem, he highlighted the very specialized packaging requirements of each end application.

Other speakers in the MEMS track also similarly highlighted their application specific WLP packaging challenges. Noureddine Hawat (MEMSIC) described the challenges of packaging a thermal (instead of capacitive) sensing MEMS accelerometer which requires tight control of a thermal gas for proper operation. Mike Shillinger (Innovative Micro Technology) described the processing challenges of bonding and dicing MEMS systems with three to five different types of wafers stacked to produce the final device. Not only is process order important, selecting processes to accommodate the different material types is crucial since not all the wafers used are silicon.

Interest in 3D IC packaging has increased significantly from last year with a total of nineteen papers, resulting in two parallel tracks of 3D papers on day two of the conference in addition to a single track on day one. For those focused on 3D packaging, it made it even more challenging to decide which one of two excellent presentations to attend. Through the diligence of the moderators, everything was kept on time and switching sessions was easy between the three tracks throughout the conference. The only challenge besides not being able to attend all presentations was finding a seat in the overflowing technical sessions.

In the 3D Plenary “A Consumer Driven Market – This Changes Everything”, Simon McElrea (Invensas Corporation) highlighted how technology – electronics and computing in particular – have significantly changed from being government and industry driven to being consumer driven. Once a market changes to being consumer driven the volumes skyrocket while the price per unit plummets. The technology then becomes pervasive and changes not only our expectations but our behaviors which further increases consumer demand. 

Satisfying the rapid growth of consumer demand will continue to require significant changes in the electronics industry in every area from intellectual property to supply chain structure to energy efficiency. For example, smartphones drove the market adoption of WLP due to the extreme premium on space within the phone. To achieve optimal results with WLP requires even closer cooperation between and across the entire range of design, wafer fabrication, packaging, and test activities. Versus in the past, each area may have only interacted with its adjacent areas in a limited fashion. 

Today everything from through silicon vias (TSV) to connectors is considered “packaging”. But Mr. McElrea prefers to use “Interconnectology” (coined by Scott Jewler) since “packaging” sounds like cardboard boxes and shrink-wrap. And Interconnectology is critical to the success of the end product especially in consumer driven markets where differentiation, including high performance, at low cost is essential.

Several of the 3D Track presentations covered interposer technologies from silicon to alternative materials including through glass vias (TGV) by Sergio Cadona (nMode) and phase change alloys (PCA) by Semyon Savransky (The TRIZ Experts). These topics were also covered by Professor Rao Tummala (Georgia Institute of Technology) in his well-attended tutorial. Test and metrology for 3D were covered including presentations by James Quinn (Multitest) and Rajiv Roy (Rudolph Technologies).

The 3D Panel of Laura Rothman Mauer (Solid State Equipment), Suresh Ramalingam (Xilinx), Jim Walker (Gartner Technology), and Abe Yee (NVIDIA Corporation) explored how close 3D packaging is to mainstream applications. Sitaram Arkalgud (Invensas Corporation) moderated this lively discussion with varying degrees of “readiness”. It is true that Xilinx is shipping production quantities of 2.5D based product. However, several issues remain “blocking” technical progress for 3D devices, with thermal issues being the biggest impediment. With 2.5D, there is not likely to be large-scale adoption beyond specialty devices until the cost is significantly lowered. As Mr. Yee said, companies will be pay slightly more for increased performance but they won’t pay significantly more unless there is no other choice. So 3D or large quantities of 2.5D will not happen unless a bold company decides to “invest” (read: spend far more than normal, possibly losing money) to push technology ahead or has no other choice in how to implement a product.

Presentations on automation, test, materials, processes, and new technology comprised the WLP Track. Many of the presentations had new solutions or twists on existing technology. For example, William Rogers (DECA Technologies) discussed how DECA was fabricating WLP using continuous flow equipment on larger panels based upon processes and equipment developed for solar panels. The continuous flow and larger panel sizes allow them to significantly reduce their costs and to improve the processing by innovation such as adaptive patterning.

In the exhibit hall, the fifty-five exhibitors demonstrated a large variety of equipment, software, and services related to WLP. Everything from enabling technology to process inspection to test equipment to consumables to turnkey services for WLP was represented. If you are a customer needing or a vendor providing WLP services, there was certainly something of interest on exhibit. The show floor was certainly busy throughout the conference and a number of exhibitors commented on the increased level of interest.

IWLPC opened with a fascinating history lesson on the origins of Silicon Valley by Paul Wesling (IEEE Components, Packaging, and Manufacturing Technology Society CPMT Distinguished Lecturer). Mr. Wesling’s keynote described how the ecosystem of companies of the vacuum tube era collaborated and prospered. This lead to the rise of Silicon Valley from these garages and sheds to that of the familiar Hewlett-Packard and Apple garages and well beyond. It is clear that the WLP ecosystem benefits from similar collaborations that are enabled by the IWLPC.

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