IEEE Nanotechnology Symposium – Day One (Sessions 1 – 3)

Here are today’s highlights from the IEEE San Francisco Bay Area Nanotechnology Council 6th Annual Symposium“Nanotechnology: State of the Art & Applications”

Presentation archive for talks not linked below. Updated as the council receives the presentations.

Dr. Michael Liehr, VP Strategy CNSE Albany, “State of US Nanotech.

  • College of Nanoscale Science and Engineering (CSNE).  Not organized around traditional degrees (ME, EE, Chem-E, etc.) but around nanoscience, nanoengineering, nanobioscience, & nanofinance.
  • Due to R&D increasing as a percentage of revenue, very few companies will be able to continue making the investments in process development on their own.  Therefore, over time there will be a migration to 2 or 3 technology clusters (or “camps”) worldwide.
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Pass or Fail? The Limits of Integrated Circuit Testing

Balancing test coverage versus test cost. What does a test failure mean? Value of yield increase

… and how it impacts your bottom line!

A poorly implemented semiconductor test cell may pass integrated circuit (IC) parts that are either defective or have marginal performance. They can cause the electronic devices in which they will be assembled to either malfunction or completely fail. However, two other conditions require evaluation. Having false negative test “escapes” is expensive in terms of final product test failures, warranty costs, customer dissatisfaction, etc. In turn, the false positive test escapes needs to be balanced against the cost of false negative failures where otherwise good parts fail the tests and are discarded. Test engineers, product managers, quality engineers, and operational managers needs to make either implicit or explicit decisions as to the proper balance in adjusting the test limits. The goal is to cost effectively approach “zero defects” without “throwing out the baby with the bath water”.

A test process generally categorizes the item or device being tested as “pass” or “fail”. Sometimes passing devices are graded (typically by speed or other desired quality) and failing devices are often grouped by failure mode. “Coverage” is how well a particular test process measures the functionality and specifications of a given device. If every feature and specification is tested then it is said to have 100% test coverage. However, exhaustive testing is usually expensive due to long test times which translates in to operational costs including the depreciation of the test system and greater test setup complexity (equipment and development cost). Sometimes complete coverage is not possible or practical so there needs to be a trade-off between coverage and cost.

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Richard Elkus – Winner Take All

US is losing its competitiveness due to financial issues and off-shoring of production.

Tonight I attended an excellent presentation by Richard Elkus, Jr. at the IEEE Components, Packaging, and Manufacturing Technology Society (CPMT) Santa Clara Valley Chapter monthly meeting. He spoke about how the United States is losing its global competitiveness due to our financial issues and our inability to manufacture technology domestically.

Early in his career at Ampex he did the product planning for and led the team that introduced the VCR. In 1970, they partnered with Toshiba to manufacturer the units. He then illustrated with multiple examples,  how we lost our ability to innovate and to remain competitive when we “off shored” the production of a given technology. This is also the subject of his book Winner Take All: How Competitiveness Shapes the Fate of Nations.

IEEE 125th Anniversary Celebration

Computer History Museum by Dzou @
You can always learn something by hearing top notch presenters speak both in terms of content and style. And even after traveling the world, you may find hidden gems in your own backyard…

This evening I attended a local celebration for IEEE‘s 125th Anniversary. This was structured as a reception (code word: “networking”) followed by several keynote speeches.

First up on the program was a presentation to SRI (formerly known as the Stanford Research Institute) to recognize the 40th anniversary of the first transmission on the the ARPANET (the predecessor of the internet). At that time there were just four nodes: SRI, UCLA, UC Santa Barbara and University of Utah. A large number of the original engineers were on hand to have their achievement recognized.
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