April 26, 2012
Some consider the many of billions of dollars invested in the semiconductor supply chain to be huge bets on yet to be proven technology and future business. Even if you take a strict view of this as simply business it is possible to learn something from gambling.
The Atlantic tells the fascinating story of how Don Johnson took Atlantic City casinos for $15 M playing blackjack. Last year he won $5 M from Borgata in February, $4 M from Caesars in March, and $6 M from Tropicana in April. This wasn’t luck and he wasn’t card counting. How did he do this and how does this connect to semiconductors and Apple?
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2.5D/3D Stacked Integrated Circuits (ICs), 450 mm wafers, Apple, Design Cycles, Economics, Management, Mobile Devices, Post PC Era, SEMI, Semiconductors | Tagged: 2.5D/3D Stacked Integrated Circuits (ICs), 450 mm wafers, Apple, Design Cycles, Economics, Management, Mobile Devices, Post PC Era, SEMI, Semiconductors | 
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Posted by Ira Feldman
March 15, 2012
Tim Cook introducing Apple's latest iPad
The “Post Personal Computer” (Post PC) era became the hot topic when Tim Cook introduced the latest iPad last week. Yes, calling it a “revolution” is definitely hype that is part of Apple‘s Post PC marketing campaign. Hype aside, it is clear that there has been a marked shift in digital hardware for the consumption of content and communication. The PC – be it a Windows, Mac, or Linux based system – is no longer “the device”. It is now one of many devices including portable music players (dominated by iPods), smart phones (lead by iPhones and Android based systems), and tablets (dominated by iPads). The shift is large and the impact is huge. To understand how big, watch the first three minutes of Mr. Cook’s presentation. Then you will understand why Apple had the largest market capitalization of any US company in February – the numbers are staggering.
Even though many were surprised to learn that we are now “Post PC”, some of us who have been developing strategies for the electronic supply chain have Read the rest of this entry »
Leave a Comment » | 2.5D/3D Stacked Integrated Circuits (ICs), Apple, Consumer Electronics Society, Load Boards, Market Analysis, MEMS, More than Moore, Packaging (Semiconductor), Post PC Era, Printed Circuit Boards (PCB), Probe Cards, Semiconductors | Tagged: 2.5D/3D Stacked Integrated Circuits (ICs), Apple, Consumer Electronics Society, Load Boards, Market Analysis, MEMS, More than Moore, Packaging (Semicondcutor), Post PC Era, Printed Circuit Boards (PCVB), Probe Cards, Semiconductors | Permalink
Posted by Ira Feldman
February 2, 2012
Michael Splinter (Applied Materials) - Relative industry cost improvements and volumes.
I hope that my summaries of the first day of SEMI Industry Strategy Symposium (ISS) 2012 in
provided useful insights to the economic roller coaster that is the semiconductor market and its equipment and material supply chain. There have also been several good reports Read the rest of this entry »
Leave a Comment » | 2.5D/3D Stacked Integrated Circuits (ICs), 450 mm wafers, Economics, Moore's Law, SEMI, Semiconductor Capital Equipment (CAPEX), Semiconductors | Tagged: 2.5D/3D Stacked Integrated Circuits (ICs), 450 mm wafers, Economics, Moore's Law, SEMI, Semiconductor Capital Equipment (CAPEX), Semiconductors | Permalink
Posted by Ira Feldman
January 25, 2012
After a gloomy first session focused on world economics at SEMI Industry Strategy Symposium (ISS) 2012, Session 2 – Semiconductor Markets was significantly more upbeat.
Stephen G. Newberry (Vice Chairman of the Board, Lam Research Corporation) started off with a way forward in Read the rest of this entry »
Leave a Comment » | 2.5D/3D Stacked Integrated Circuits (ICs), 450 mm wafers, Economics, Moore's Law, SEMI, Semiconductor Capital Equipment (CAPEX), Semiconductors | Tagged: 2.5D/3D Stacked Integrated Circuits (ICs), 450 mm wafers, Economics, Moore's Law, SEMI, Semiconductor Capital Equipment (CAPEX), Semiconductors | Permalink
Posted by Ira Feldman
November 28, 2011
Click image to download presentation
Back for the second year (with a minor name change), the Silicon Valley Test Workshop is an unpolished gem. Looking past the rough edges (minor logistical issues), what really shines through is the interaction of the participants. This conference really has Read the rest of this entry »
Leave a Comment » | 2.5D/3D Stacked Integrated Circuits (ICs), Automatic Test Equipment (ATE), Load Boards, Moore's Law, More than Moore, My Presentations, Packaging (Semiconductor), Printed Circuit Boards (PCB), Probe Cards, Semiconductor Test, Test Engineers, Through-Silicon Vias (TSV), ToThePoint | Tagged: 2.5D/3D Stacked Integrated Circuits (ICs), Automatic Test Equipment (ATE), Load Boards, Moore's Law, More than Moore, My Presentations, Packaging (Semicondcutor), Printed Circuit Boards (PCVB), Probe Cards, Semiconductor Test, Test Engineers, Through-Silicon Vias (TSV), ToThePoint | Permalink
Posted by Ira Feldman
November 10, 2011
The MEPTEC “2.5D, 3D and Beyond – Bringing 3D Integration to Packaging Mainstream” conference was a mixed-bag. Yes, it is always exciting to hear about new suppliers and progress. But it is disconcerting to realize that the price of progress is an ongoing burden on our industry’s supply chain.
Subramanian Iyer (IBM) and Theresa Sze (Oracle) started with Read the rest of this entry »
Leave a Comment » | 2.5D/3D Stacked Integrated Circuits (ICs), Manufacturing, MEPTEC, Packaging (Semiconductor), Probe Cards, Semiconductor Test, Semiconductors, Through-Silicon Vias (TSV) | Tagged: 2.5D/3D Stacked Integrated Circuits (ICs), Manufacturing, MEPTEC, Packaging (Semicondcutor), Probe Cards, Semiconductor Test, Semiconductors, Through-Silicon Vias (TSV) | Permalink
Posted by Ira Feldman
July 26, 2011
Here are the highlights from Session Four – “High Performance Probing” of the 21st annual IEEE Semiconductor Wafer Test Workshop (SWTW) from Monday June 13, 2011.
Bob Davis, Rudolph Technologies, “Testing Probe Cards That Contain Complex Circuitry“:
Over time, probe cards have increased in complexity from simple wire cantilever probes to those including passive components and digital control circuits. Some of these digital control circuits may even contain state based logic. At the same time the physical complexity of probe cards have increased in probe and channel counts, probe density, and total probe force. As a result, Read the rest of this entry »
Leave a Comment » | 2.5D/3D Stacked Integrated Circuits (ICs), DRAM, More than Moore, Packaging (Semiconductor), Probe Card Metrology Tools, Probe Cards, Semiconductor Test, Semiconductor Wafer Test Workshop, Through-Silicon Vias (TSV) | Tagged: DRAM | Permalink
Posted by Ira Feldman
