March 14, 2013
Sunset over Phoenix, Arizona during BiTS Workshop
As the Burn-in & Test Strategies (BiTS) Workshop 2013 fades into the sunset (queue the music), here is a round-up of the highlights. There were gun fights in the corral as well as technical questions for the presenters. The saloon girls and gunfighters took an edge off of the “geek” factor. This year over three hundred fifty people come to the “Circle BiTS Ranch” (aka the Hilton in Mesa, Arizona) for the premier conference focused on what is new and next for semiconductor test tooling and strategy. Oh, did I mention that the theme this year was Western?
This was the 14th annual BiTS Workshop, which has achieved the perfect conference trifecta of Read the rest of this entry »
Leave a Comment » | 
BiTS Workshop, Cost of Test, DRAM, Interconnectology, Load Boards, Memory Technology, Moore's Law, More than Moore, My Presentations, Packaging (Semiconductor), Printed Circuit Boards (PCB), Probe Cards, Semiconductor Capital Equipment (CAPEX), Semiconductor Test, Semiconductors, Spring Pins, Test Engineers | Tagged: BiTS Workshop, Cost of Test, DRAM, Interconnectology, Load Boards, Memory Technology, Moore's Law, More than Moore, My Presentations, Packaging (Semicondcutor), Printed Circuit Boards (PCB), Probe Cards, Semiconductor Capital Equipment (CAPEX), Semiconductor Test, Semiconductors, Spring Pins, Test Engineers | 
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Posted by Ira Feldman
March 15, 2012
Tim Cook introducing Apple's latest iPad
The “Post Personal Computer” (Post PC) era became the hot topic when Tim Cook introduced the latest iPad last week. Yes, calling it a “revolution” is definitely hype that is part of Apple‘s Post PC marketing campaign. Hype aside, it is clear that there has been a marked shift in digital hardware for the consumption of content and communication. The PC – be it a Windows, Mac, or Linux based system – is no longer “the device”. It is now one of many devices including portable music players (dominated by iPods), smart phones (lead by iPhones and Android based systems), and tablets (dominated by iPads). The shift is large and the impact is huge. To understand how big, watch the first three minutes of Mr. Cook’s presentation. Then you will understand why Apple had the largest market capitalization of any US company in February – the numbers are staggering.
Even though many were surprised to learn that we are now “Post PC”, some of us who have been developing strategies for the electronic supply chain have Read the rest of this entry »
Leave a Comment » | 2.5D/3D Stacked Integrated Circuits (ICs), Apple, Consumer Electronics Society, Load Boards, Market Analysis, MEMS, More than Moore, Packaging (Semiconductor), Post PC Era, Printed Circuit Boards (PCB), Probe Cards, Semiconductors | Tagged: 2.5D/3D Stacked Integrated Circuits (ICs), Apple, Consumer Electronics Society, Load Boards, Market Analysis, MEMS, More than Moore, Packaging (Semicondcutor), Post PC Era, Printed Circuit Boards (PCV), Probe Cards, Semiconductors | Permalink
Posted by Ira Feldman
November 28, 2011
Click image to download presentation
Back for the second year (with a minor name change), the Silicon Valley Test Workshop is an unpolished gem. Looking past the rough edges (minor logistical issues), what really shines through is the interaction of the participants. This conference really has Read the rest of this entry »
Leave a Comment » | 2.5D/3D Stacked Integrated Circuits (ICs), Automatic Test Equipment (ATE), Load Boards, Moore's Law, More than Moore, My Presentations, Packaging (Semiconductor), Printed Circuit Boards (PCB), Probe Cards, Semiconductor Test, Test Engineers, Through-Silicon Vias (TSV), ToThePoint | Tagged: 2.5D/3D Stacked Integrated Circuits (ICs), Automatic Test Equipment (ATE), Load Boards, Moore's Law, More than Moore, My Presentations, Packaging (Semicondcutor), Printed Circuit Boards (PCV), Probe Cards, Semiconductor Test, Test Engineers, Through-Silicon Vias (TSV), ToThePoint | Permalink
Posted by Ira Feldman
July 26, 2011
Here are the highlights from Session Four – “High Performance Probing” of the 21st annual IEEE Semiconductor Wafer Test Workshop (SWTW) from Monday June 13, 2011.
Bob Davis, Rudolph Technologies, “Testing Probe Cards That Contain Complex Circuitry“:
Over time, probe cards have increased in complexity from simple wire cantilever probes to those including passive components and digital control circuits. Some of these digital control circuits may even contain state based logic. At the same time the physical complexity of probe cards have increased in probe and channel counts, probe density, and total probe force. As a result, Read the rest of this entry »
Leave a Comment » | 2.5D/3D Stacked Integrated Circuits (ICs), DRAM, More than Moore, Packaging (Semiconductor), Probe Card Metrology Tools, Probe Cards, Semiconductor Test, Semiconductor Wafer Test Workshop, Through-Silicon Vias (TSV) | Tagged: DRAM | Permalink
Posted by Ira Feldman
June 18, 2011
On Sunday evening June 12th, 2011 Jerry Broz, the general conference chair, opened the IEEE Semiconductor Wafer Test Workshop welcoming us to the 21st year with a combined total attendance of over 5,000. He also briefly highlighted the positives in recent market trend data from the Semiconductor Industry Association (SIA) and VLSIresearch.
Dr. William Chen, Senior Technical Advisor, ASE Group, provided the keynote presentation “Backend to the Front Line”:
Dr. Chen started with Read the rest of this entry »
2 Comments | MEMS, Moore's Law, More than Moore, Packaging (Semiconductor), Probe Cards, Semiconductor Test, Semiconductor Wafer Test Workshop, Semiconductors | Tagged: Memory Technology, Semiconductors | Permalink
Posted by Ira Feldman
May 19, 2011
Dr. Narayan
The
IEEE San Francisco Bay Area Nanotechnology Council held their 7th annual symposium this week. As in the past, the council presents an excellent program. This year’s program focused was “
Nanotechnology – Consumer Applications.”
Here are my notes from the keynote presentation by Dr. Spike Narayan, Functional Manager IBM, “Nanotechnology: Leveraging Semiconductor Technologies to Address Global Challenges.”
He asks: can we leverage semiconductor technology to address global challenges of environment, energy, healthcare, and water? Others have made a compelling argument that Read the rest of this entry »
Leave a Comment » | Batteries, Bioscience, Clean Tech (Green), Energy, Environment, Grand Challenges, Healthcare, IEEE, Medical Devices, More than Moore, Nanotechnology, Photolithography, Water | Tagged: IEEE, Nanotechnology | Permalink
Posted by Ira Feldman
March 24, 2011
…or Memory Magic via More Than Moore
Toshiba 16 Die Stack (64 GB NAND Flash)
No this isn’t a soliloquy to an Apple iPad that is no longer, but a brief tour of the incredible memory, packaging, and system technology that can be found under the hoods of the original iPad and the iPad 2 along with some of the manufacturing and test implications. These devices clearly demonstrate the new paradigm of “More Than Moore“ where scaling of systems and packaging will propel the next wave of growth in electronics beyond the traditional doubling of performance every two years predicted by Moore’s Law. For many in semiconductor packaging and test engineering communities the issues related to More than Moore have been an academic discussion up to now, but clearly the success of the iPad product line shows the current reality for advanced devices and where the future is headed. Apple and their suppliers took huge risks in developing these new technologies in exchange for substantial returns.
As I recently noted in “Memory Alphabet Soup“, the most pressing question about memory most consumers currently have is “which iPad 2?” – 16 GB, 32 GB, or 64 GB? If Mr. Jobs believed in Read the rest of this entry »
3 Comments | Apple, FLASH Memory, Marketing, More than Moore, Product Management, Teardown / Reverse Engineering | Tagged: Apple, FLASH Memory, Memory Technology | Permalink
Posted by Ira Feldman
